Management of design process, design flows and design databases

Jump to: Select a forum||--EDA Methodologies, Tools, Flows & IP Cores; Interoperability and Reuse (EDA)|   |--IP authoring tools and methodologies|   |--Risk management of IP reuse|   |--Third party testing of IP blocks|   |--Integration, Testing, Qualifying, and Manufacturing of IP Blocks from Multiple Vendors|   |--Qualification of libraries and hard IP blocks|   |--Design and maintenance of technology independent hard and soft IP blocks|   |--IP modeling and abstraction|   |--Emerging EDA standards|   |--EDA tools interoperability issues and implications|   |--Management of design process, design flows and design databases|   |--EDA tools addressing design for manufacturing, yield, and reliability|   |--Design for Manufacturability/Yield & Quality (DFMQ)    |--Definitions, Methodologies, Matrices, and Standards